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MK3727
LOW COST 24 - 36 MHZ 3.3 VOLT VCXO
Description
The MK3727 series of devices include the original MK3727S, MK3727A, and the new MK3727C and MK3727D. The MK3727D and MK3727C are drop-in replacements for the MK3727S and MK3727A devices. Compared to these earlier devices the MK3727D and MK3727C offer a wider operating frequency range and improved power supply noise rejection. The MK3727D is recommended for new designs. The MK3727 series combines the functions of a VCXO (Voltage Controlled Crystal Oscillator) and PLL (Phase Locked Loop) frequency doubler onto a single chip. Used in conjunction with an external pullable quartz crystal, this monolithic integrated circuit replaces more costly hybrid (canned) VCXO devices. The MK3727 is designed primarily for data and clock recovery applications within end products such as ADSL modems, set-top box receivers, and telecom systems. The MK3727D is recommended for new designs. The MK3727D exhibits a moderate VCXO gain of 120ppm/V typical, when used with a high quality external pullable quartz crystal. The MK3727C offers a higher VCXO gain of 150ppm/V, similar to the earlier MK3727A. The higher intrinsic VCXO gain of the MK3727C may help compensate for the reduced pullability of a low quality crystal used in some applications. However, higher VCXO gain may also increase clock output phase noise. The frequency of the on-chip VCXO is adjusted by an external control voltage input into pin VIN. Because VIN is a high impedance input, it can be driven directly from an PWM RC integrator circuit. Frequency output increases with VIN voltage input. The usable range of VIN is 0 to 3V.
Features
* MK3727D and MK3727C are drop-in upgrades to the
earlier MK3727S and MK3727A devices
* MK3727D and MK3727C offer 24-36 MHz output
frequency range (output frequency = 2x crystal frequency) and improved power supply noise rejection
* Uses an inexpensive 12 to 18 MHz external crystal * Ideal for ADSL applications using 17.664 MHz
external pullable crystal to generate locked 35.328 MHz clock physical layer clock
* Ideal for set-top box applications using 13.5 MHz
external pullable crystal to generate lock 27 MHz clock transport video clock
* On-chip VCXO with guaranteed pull range of 115
ppm minimum (MK3727D)
* VCXO input tuning voltage 0 to 3.3 V * Packaged in 8 pin SOIC (150 mil wide)
MK3727D is Recommended for New Designs.
Block Diagram
V IN
12-18 M H z P ullable C ry stal
X1
X2
V o ltag e C o n tro lled C rystal O scillato r
PLL Freq u en cy D o ub ler
24-36 M H z (2x C rystal F requenc y)
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MK3727 LOW COST 24 - 36 MHZ 3.3 VOLT VCXO
Pin Assignment
X1 VDD VIN GND 1 2 3 4
MK3727S MK3727A MK3727C MK3727D 8 Pin (150 mil) SOIC
8 7 6 5
X2 GND NC CLK
Pin Descriptions
Pin Number
1 2 3 4 5 6 7 8
Pin Name
XI VDD VIN GND CLK NC GND X2
Pin Type
Input Power Input Power Output -Power Input
Pin Description
Crystal connection -- Connect to the external pullable crystal. Connect to +3.3 V (0.01uf decoupling capacitor recommended) Voltage input to VCXO -- 0 to 3.3 V analog input which controls the oscillation frequency of the VCXO. Connect to ground Clock output No internal connection (may connect to ground or VDD) Connect to ground Crystal connection -- Connect to the external pullable crystal.
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External Component Selection
The MK3727 requires a minimum number of external components for proper operation.
Decoupling Capacitor
A decoupling capacitor of 0.01F must be connected between VDD (pin 2) and GND (pin 4), as close to these pins as possible. For optimum device performance, the decoupling capacitor should be mounted on the component side of the PCB. Avoid the use of vias in the decoupling circuit.
The external crystal must be connected as close to the chip as possible and should be on the same side of the PCB as the MK3727. There should be no via's between the crystal pins and the X1 and X2 device pins. There should be no signal traces underneath or close to the crystal.
Crystal Tuning Load Capacitors
The crystal traces should include pads for small fixed capacitors, one between X1 and ground, and another between X2 and ground. Stuffing of these capacitors on the PCB is optional. The need for these capacitors is determined at system prototype evaluation, and is influenced by the particular crystal used (manufacture and frequency) and by PCB layout. The typical required capacitor value is 1 to 4 pF. To determine the need for and value of the crystal adjustment capacitors, you will need a PC board of your final layout, a frequency counter capable of about 1 ppm resolution and accuracy, two power supplies, and some samples of the crystals which you plan to use in production, along with measured initial accuracy for each crystal at the specified crystal load capacitance, CL. To determine the value of the crystal capacitors: 1. Connect VDD of the MK3727 to 3.3V. Connect pin 3 of the MK3727 to the second power supply. Adjust the voltage on pin 3 to 0V. Measure and record the frequency of the CLK output. 2. Adjust the voltage on pin 3 to 3.3V. Measure and record the frequency of the same output. To calculate the centering error:
Series Termination Resistor
When the PCB trace between the clock output (CLK, pin 5) and the load is over 1 inch, series termination should be used. To series terminate a 50 trace (a commonly used trace impedance) place a 33 resistor in series with the clock line, as close to the clock output pin as possible. The nominal impedance of the clock output is 20.
Quartz Crystal
The MK3727 VCXO function consists of the external crystal and the integrated VCXO oscillator circuit. To assure the best system performance (frequency pull range) and reliability, a crystal device with the recommended parameters (shown below) must be used, and the layout guidelines discussed in the following section shown must be followed. The frequency of oscillation of a quartz crystal is determined by its "cut" and by the load capacitors connected to it. The MK3727 incorporates on-chip variable load capacitors that "pull" (change) the frequency of the crystal. The crystal specified for use with the MK3727 is designed to have zero frequency error when the total of on-chip + stray capacitance is 14pF. Recommended Crystal Parameters: Initial Accuracy at 25C Temperature Stability Aging Load Capacitance Shunt Capacitance, C0 C0/C1 Ratio Equivalent Series Resistance
6 ( f 3.0V - f t arg et ) + ( f 0V - f t arg et ) Error = 10 x ----------------------------------------------------------------------------- - errorxtal ft arg et
Where: 20 ppm 30 ppm 20 ppm 14 pf 7 pF Max 250 Max 35 Max ftarget = nominal crystal frequency errorxtal =actual initial accuracy (in ppm) of the crystal being measured If the centering error is less than 25 ppm, no adjustment is needed. If the centering error is more than 25ppm negative, the PC board has excessive stray capacitance and a new PCB layout should be
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considered to reduce stray capacitance. (Alternately, the crystal may be re-specified to a higher load capacitance. Contact ICS MicroClock for details.) If the centering error is more than 25ppm positive, add identical fixed centering capacitors from each crystal pin to ground. The value for each of these caps (in pF) is given by:
External Capacitor = 2 x (centering error)/(trim sensitivity) Trim sensitivity is a parameter which can be supplied by your crystal vendor. If you do not know the value, assume it is 30 ppm/pF. After any changes, repeat the measurement to verify that the remaining error is acceptably low (typically less than 25ppm).
Absolute Maximum Ratings
Stresses above the ratings listed below can cause permanent damage to the MK3727. These ratings, which are standard values for ICS commercially rated parts, are stress ratings only. Functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can affect product reliability. Electrical parameters are guaranteed only over the recommended operating temperature range.
Item
Supply Voltage, VDD All Inputs and Outputs Ambient Operating Temperature Storage Temperature Soldering Temperature 7V
Rating
-0.5V to VDD+0.5V 0 to +70C -65 to +150C 260C
Recommended Operation Conditions
Parameter
Ambient Operating Temperature Power Supply Voltage (measured in respect to GND) Reference crystal parameters
Min.
0 +3.15
Typ.
-
Max.
+70 +3.45
Units
C V
Refer to page 3
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DC Electrical Characteristics
VDD=3.3V 5% , Ambient temperature 0 to +70C, unless stated otherwise
Parameter
Operating Voltage Output High Voltage Output Low Voltage Output High Voltage (CMOS Level) Operating Supply Current Short Circuit Current VIN, VCXO Control Voltage
Symbol
VDD VOH VOL VOH IDD IOS VIA
Conditions
IOH = -12 mA IOL = 12 mA IOH = -4 mA Output = 27 MHz, no load
Min.
3.15 2.4
Typ.
Max.
3.45 0.4
Units
V V V V
VDD-0.4 10 50 0 3.3
mA mA V
AC Electrical Characteristics
VDD = 3.3V 5%, Ambient Temperature 0 to +70 C, unless stated otherwise
Parameter
Output Frequency MK3727D and MK3727C MK3727A and MK3727S Crystal Pullability MK3727D and MK3727C MK3727A and MK3727S VCXO Gain MK3727D MK3727C MK3727A MK3727S Output Rise Time Output Fall Time Output Clock Duty Cycle Maximum Output Jitter, short term tOR tOF tD tJ VIN = VDD/2 + 1V, Note 1 VIN = VDD/2 + 1V, Note 1 VIN = VDD/2 + 1V, Note 1 VIN = VDD/2 + 1V, Note 1 0.8 to 2.0V, CL=15pF 2.0 to 0.8V, CL=15pF Measured at 1.4V, CL=15pF CL=15pF 40 50 100 120 150 170 100 1.5 1.5 60 ppm/V ppm/V ppm/V ppm/V ns ns % ps FP FP 0V< VIN < 3.3V, Note 1 0V< VIN < 3.3V, Note 1 + 115 + 100 ppm ppm FO FO VCXO Crystal frequency = 1/2 Output VCXO Crystal frequency = 13.5 MHz 24 27 36 MHz MHz
Symbol
Conditions
Min.
Typ.
Max. Units
Note 1: External crystal device must conform with Pullable Crystal Specifications listed on page 3.
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Package Outline and Package Dimensions (8 pin SOIC, 150 Mil. Narrow Body)
Package dimensions are kept current with JEDEC Publication No. 95
Millimeters Min Max Inches Min Max
Symbol
Index Area
EH
Pin 1
D
h x 450
A A1 B C D E e H h L a
1.35 1.75 1.10 0.25 0.33 0.51 0.19 0.25 4.80 5.00 3.80 4.00 1.27 Basic 5.80 6.20 0.25 0.50 0.40 1.27 0 8
0.0532 0.0688 0.0040 0.0098 0.013 0.020 0.0075 0.0098 .1890 .1968 0.1497 0.1574 0.050 Basic 0.2284 0.2440 0.010 0.020 0.016 0.050 0 8
A Q e b c
Ordering Information
Part / Order Number (Note 1)
MK3727D MK3727DTR MK3727C MK3727CTR MK3727A MK3727ATR MK3727S MK3727STR
Marking
MK3727D MK3727D MK3727C MK3727C MK3727A MK3727A MK3727S MK3727S
Shipping packaging
Tubes Tape and Reel Tubes Tape and Reel Tubes Tape and Reel Tubes Tape and Reel
Package
8 pin SOIC 8 pin SOIC 8 pin SOIC 8 pin SOIC 8 pin SOIC 8 pin SOIC 8 pin SOIC 8 pin SOIC
Temperature
0 to +70 C 0 to +70 C 0 to +70 C 0 to +70 C 0 to +70 C 0 to +70 C 0 to +70 C 0 to +70 C
Note 1: MK3727D is recommended for new designs. While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems (ICS) assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or critical medical instruments.
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